Display

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Introduction

s1mp3s have used many different types of displays and they may be connected differently depending on the model, but their general principle of operation is the same. From the programmer's perspective, all LCM will appear to have the following connectivity with the SoC, although the hardware interface may be different; their purpose is described in the following sections:

  • Chip Select/Enable (CS, EN, etc.)
  • Reset (RST, -RST, etc.)
  • Data Bus (D0-D7)
  • Data/Command (A0, D/C, etc.)
  • Read/Write (MRD/-MWR, etc.)
  • Backlight (LIGHT, BK_EN, etc.)

See LCMControllers for the specifics of different controller types, and LCMControllerDetection to determine the controller and connectivity used in a player.

Here is an example of some display devices used on s1mp3s :

  • 132*32 (samsung s6b0724 datasheet)
  • 128*64 (Area Colour OLED)
  • 1*6 (7 segments display b/w)
  • 128x160 TFT Color Display

Connectivity

Chip Select/Enable

LCM will ignore data on other pins unless this signal is enabled. By convention, chip select lines are active low. It is usually connected to CE3- of the SoC, although there have been schematics of players that have it on CE2-, CE4-, or even CE5- (in the case of a particular ACU7515 design).

Reset

This signal is pulsed low to reset the LCM hardware and initialize it to a predetermined state. See the datasheet for your specific controller for the specific timing requirements of this signal. In s1mp3 devices this signal can be connected to any of the GPIOs on the SoC, examples include A2, B4, E3, etc.

Data Bus

An 8-bit wide bus shared with the NAND flash. Instructions and data to and from LCM are communicated through this. With the exception of very few tiny-screen devices that connect the LCM via serial interface, this will always be the case.

Data/Command

The usual interpretation of this signal is to change between commands and data sent to the controller, although with some rarer controller types it may be used for a different purpose (register select index/register data, for example). In the usual interpretation, when this signal is low the signals on the data bus are commands, while they are interpreted as data or command parameters if the signal is high. Refer to the documentation for your specific controller for more information.

As with the reset signal, this line can be connected to any of the GPIOs. Examples include A1, C2, B4, B5, etc.

Read/Write

These signals are part of the 80-series MCU standard memory bus interface and are programmer-transparent. They determine the direction of data transfer (to or from LCM) and will be controlled by MCU on performing reads or writes to/from any address in the external memory region (8000 - FFFF).

Backlight

Controls the display backlight, and may not be present on devices which have a reflective display (no backlight). If present, it is usually connected to enable input of the backlight inverter IC. The connectivity of this pin to the SoC's GPIOs also varies widely, and may either be active-low or active-high.

Note

  • RS is set via GPIO Ports to send commands to LCD.
  • RD/WR is handled automagicly when you read or write to LCD memory region (0x8000-0xFFFF).
  • When EM High Page Register is set to CE3, memory read/write from 0x8000 to 0xFFFF enables the CS3# line.
  • LCDRST When high it starts the LCD reset sequence, but on some displays the LCD isn't turned on after this, so you will need to send the command to turn on the LCD.

To select CS3# mapping, you have to do the following:

 ld a, 0x18    ; CE3
 out (0x2),a   ; EM High Page Register (0x8000-0xFFFF)

Details from the LCD controller

When the screen is black/white, one pixel is equal to 1 bit (so the format can be called "planar" by opposition to the "chunky" indexed format where 1 byte = 1 pixel).

So, if the size of the screen is 128 x 32 pixels, in memory, a full screen picture takes 4 * 128 bytes = 512 bytes.

Bits are gathered vertically, 1 byte contains the bits for 1 column of 8 pixels.

And then horizontally so byte 0 = column 0, byte 1 = column 1, etc.

Sending a byte (8 pixels) to the lcd screen will increase the column register by 1 so 128*8 pixels can be pushed at one time easily by the processor. When the column 127 is reached LCD_SET_PAGE register must be increased by 1 to be able to access to the next page of pixels and the column registers must be cleared, the whole process is repeated for the 4 pages of pixels.


Byte 0: 8-pixels column 0 / row 0 to 7
Byte 1: 8-pixels column 1 / row 0 to 7
Byte 2: 8-pixels column 2 / row 0 to 7
...

Byte 128: 8-pixels column 0 / row 8 to 15
Byte 129: 8-pixels column 1 / row 8 to 15
Byte 130: 8-pixels column 2 / row 8 to 15
...

Byte 256: 8-pixels column 0 / row 16 to 23
Byte 257: 8-pixels column 1 / row 16 to 23
Byte 258: 8-pixels column 2 / row 16 to 23
...

Byte 384: 8-pixels column 0 / row 24 to 31
Byte 385: 8-pixels column 1 / row 24 to 31
Byte 386: 8-pixels column 2 / row 24 to 31
...

Byte 511: 8-pixels column 127 / row 24 to 31

Organization of bytes & bits:


Page 0

Byte #             0      1  ...    127  -- X axis
Bit # / Row #  0 / 0  0 / 0  ...  0 / 0
               1 / 1  1 / 1  ...  1 / 1
               2 / 2  2 / 2  ...  2 / 2
               3 / 3  3 / 3  ...  3 / 3
               4 / 4  4 / 4  ...  4 / 4
               5 / 5  5 / 5  ...  5 / 5
               6 / 6  6 / 6  ...  6 / 6
               7 / 7  7 / 7  ...  7 / 7

Page 1

Byte #             0      1  ...    127  -- X axis
Bit # / Row #  0 / 8  0 / 8  ...  0 / 8
               1 / 9  1 / 9  ...  1 / 9
               2 /10  2 /10  ...  2 /10
               3 /11  3 /11  ...  3 /11
               4 /12  4 /12  ...  4 /12
               5 /13  5 /13  ...  5 /13
               6 /14  6 /14  ...  6 /14
               7 /15  7 /15  ...  7 /15

Page 2

Byte #             0      1  ...    127  -- X axis
Bit # / Row #  0 /16  0 /16  ...  0 /16
               1 /17  1 /17  ...  1 /17
               2 /18  2 /18  ...  2 /18
               3 /19  3 /19  ...  3 /19
               4 /20  4 /20  ...  4 /20
               5 /21  5 /21  ...  5 /21
               6 /22  6 /22  ...  6 /22
               7 /23  7 /23  ...  7 /23

Page 3

Byte #             0      1  ...    127  -- X axis
Bit # / Row #  0 /24  0 /24  ...  0 /24
               1 /25  1 /25  ...  1 /25
               2 /26  2 /26  ...  2 /26
               3 /27  3 /27  ...  3 /27
               4 /28  4 /28  ...  4 /28
               5 /29  5 /29  ...  5 /29
               6 /30  6 /30  ...  6 /30
               7 /31  7 /31  ...  7 /31

|
|
Y axis

Bit set = foreground color (usually black) Bit clear = background color (depends on the led(s)).