Memory map
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MCU internal memory map
ZRAM
ZRAM, also called ZRAM1, 16 kilobytes (0x0000 - 0x3FFF)
This memory is used for the actual execution of dynamically loaded Z80 code.
The content of this memory is undefined after any reset or power-up.
0x0000 - 0x01FF [0.5KB] = ISR (Interrupt Service Routine), global and temporary variables
0x0200 - 0x03FF [0.5KB] = Stack; PCB (Program Control Block)
0x0600 - 0x06FF [0.5KB] = Overlay bankA
0x0700 - 0x07FF [0.5KB] = Keyboard/Wired keyboard driver
0x0800 - 0x2BFF [9KB] = AP Bank {Udisk AP; Storage driver; Display driver}
0x2C00 - 0x33FF [2KB] = USB Mass Storage driver bank
0x3400 - 0x35FF [0.5KB] = ECC Buffer
0x3600 - 0x3BFF [1.5 KB] =
... {BrecLauncher (boot code); }
... {disk read driver; }
... {overlay module manager; } [1.5KB]
... {API entries }
0x3C00 - 0x3FFF [1KB] = part of event manager, DMA
0x4000 - 0x7FFF [mapped] = URAM (see below)
0x8000 - 0xFFFF [mapped] = Exended Memory (see below)
[ZRAM2]
0x4000 - 0x43FF [1KB] = Display driver / Uram x 1 Kbytes
0x4400 - 0x47FF [1KB] = Frame buffer / Uram x 1 Kbytes
0x4800 - 0x47FF [2KB] = Overlay bankB / Uram y 2 Kbytes
URAM
URAM, 16 kilobytes (0x4000 - 0x7FFF) This address space hosts 7 different memory banks, each one selectable by the MEM_PAGE_REG (05)...
- ZRAM2, 4 kilobytes (0x4000 - 0x4FFF), extends ZRAM, used for USB transfers
0x4000 - { }
. { }
. { URAM X } 2 Kbytes
. { }
0x4800 - { }
. { }
. { URAM Y } 2 Kbytes
. { }
0x4FFF
- IPMH, 16 kilobytes (0x4000 - 0x7FFF), upper byte of IPM, program memory of the DSP
- IPMM, 16 kilobytes (0x4000 - 0x7FFF), middle byte of IPM, program memory of the DSP
- IPML, 16 kilobytes (0x4000 - 0x7FFF), lower byte of IPM, program memory of the DSP
- IDMH, 16 kilobytes (0x4000 - 0x7FFF), upper byte of IDM, data memory of the DSP
- IDMM, 16 kilobytes (0x4000 - 0x7FFF), middle byte of IDM, data memory of the DSP
- IDML, 16 kilobytes (0x4000 - 0x7FFF), lower byte of IDM, data memory of the DSP
Extended Address Space
Extended Address Space (0x8000 - 0xFFFF) is used to access external memory or devices.
The lower 15 address bits (A0..A14) access the external memory bus directly (EMB). The EMB's
address space gets extended by the registers EM_PAGE_LO_REG (01) and EM_PAGE_HI_REG (02).
This way the external address gets build from a total of 29 bits (EMA0..EMA28).
The three most significant bits (EMA28:27:26) specify the memory bank. These lines get
multiplexed to the chip select/enable signals (CS0..CS3, or CE0..CE3).
The chip select/enable lines are connected this way...
- CS0 -> BROM, TROM
- CS1 -> main NAND flash chip
- CS2 -> second NAND flash chip
- CSx -> display controller
This results into these address spaces...
- BROM: 0x00000000 - 0x00001FFF
- TROM: 0x00010000 - 0x000153FF
- NAND1: 0x04000000 - 0x04007FFF
- NAND2: 0x08000000 - 0x08007FFF
Related pages
- BROM, the internal boot EEPROM
- TROM, another internal EEPROM
- NAND, the big onboard flash memory
- Wikipedia RAM article
